Eric, please tell me your opinion about 'New PI circuit idea'

[Anonymous]

Eric hi,
I believe that you're the most apropriate man to judge if I'm loosing my time with this or if it has some potential. Do you know anything regarding to this? Have you ever tried something similar?
Below is the link to the message.

 

[Anonymous]

Hi Billy
From what I can glean from this method, you would setup the comparator to trip at one particular voltage, clear and start the counter after a delay from Tx shutoff.
Then when the decay curve reaches the comparator trip point, save the elapsed time.
On the next pulse the comparator is set to trip at a lower voltage, the counter is started when the time has reached the point of the previous timer value, or this is subtracted from the total when it next trips. Now you have the time it takes for the decay to travel between two points, you repeat this as many times as necessary to achieve the desired resolution.
The recorded points now indicate the dv/dt of the signal. This data could now be filtered, and analysed in the frequency domain by a co-processor, or as you point out a dedicated external comparator/counter would free up the uC.
Good use of available resources.
Cheers
Kev.

 

[Anonymous]

Thank you Kev. You got it. Do you find it a viable idea?

 

[Anonymous]

Hi Billy,
Certainly worth a try. I remember someone at Oxford trying a similar system and it seemed to work OK. Not something I have tried though, so I will follow it with interest.
Eric.

 

[Anonymous]

Thank you Eric, that is most encouraging. I'll inform when I have more details. In the meantime every suggestion/help is appreciated.

 

[Anonymous]

Hi Billy,
I like the idea. I would like to experiment with it myself. By using an array of comparators, and utilising an interrupt on change facility of the uC port pins (even multiplexed to provide expanded range) and saving the counter contents on each interrupt, a very fast analogue solution to getting the signal data into the uC.
Cheers
Kev

 

[Anonymous]

Yes Kev, that's the point. But the interrupt will worsen the SNR. You have to account for the added clocks. You need at least three points and why not more, referense voltages that are steady only in reference to each other. Even with simple gates, it is rather easy to clock and count pulses (through an AND gate?) when comparator output is high.
The main positive thing of the uc is that you can break the job into small tasks to be done at each TX pulse.
Right now I'm on the proccess of deciding how much amplification do I need. I'd prefer nothing in front as amplifier (to be pure digital) but ...
Anyway, as I'm working on it, I see that at least, it'll be a beautifull add-on discriminating card for any PI.